1. Field of the Invention
This invention relates to processors and, more particularly, to execution of floating-point arithmetic instructions.
2. Description of the Related Art
Many processor implementations include support for floating-point arithmetic, and in particular for floating-point divide operations. However, in the majority of cases, hardware support for floating-point division is restricted to instances in which the operands are normalized numbers. If either the dividend or divisor is a denormal number, a software trap must be taken to perform the division, which results in a substantial number of extra execution cycles.